Recently, a semiconductor device such as a dynamic random access memory or “DRAM” is fabricated such that is has a high integration operates at a high speed. In the case of high-speed and high-performance semiconductor chips, a low-voltage operational characteristic is required in order to reduce heat generated in the semiconductor chip caused by high power.
However, since most semiconductor chips are packaged by using an organic substrate and a wire bonding, chip characteristics are seriously degraded when the semiconductor chips have been packaged.
FIGS. 1 and 2 are sectional views illustrating conventional semiconductor packages. Hereinafter, problems of the conventional semiconductor packages will be described with reference to FIGS. 1 and 2.
FIG. 1 is a sectional view showing a face-up type FBGA (fine pitch ball grid array) package 10. As shown in FIG. 1, the face-up type FBGA package 10 may cause degradation of chip characteristics when a bonding wire 15, which electrically connects a semiconductor chip 12 with a substrate 12, has a long length.
In addition, FIG. 2 is a sectional view showing a face-down type FBGA package 20. As shown in FIG. 2, according to the face-down type FBGA package 20, left and right power lines are separated from each other by a window formed at the center portion of a substrate 21, so that power cannot be easily supplied into a semiconductor chip 22, causing degradation of the chip characteristics.
In FIGS. 1 and 2, reference numerals 13 and 23 represent bonding pads. Reference numerals 14 and 24 represent adhesives. Reference numerals 17 and 27 represent solder balls and reference numeral 25 represent the bonding wire, respectively.
Meanwhile, a high-speed and high-performance semiconductor chip is generally fabricated such that it has a plurality of aluminum bonding pads. However, in the case of the high-speed and high-performance semiconductor chip having a plurality of aluminum bonding pads, it is impossible to perform the wire bonding process for all aluminum bonding pads in the substrate due to the limitation of the package size. In order to solve the above problem, a bonding option of a power pin has been suggested. However, this may cause degradation of electric characteristics of the package. In short, the high-speed and high-performance semiconductor chip also represents the characteristic degradation in the package.
In addition, although a multiple substrate has been suggested in order to solve the above problem, it may cause a warpage of the package and migration of copper ions, thereby lowering reliability of the package, so the multiple substrate is rarely used in practice.